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Issue No. 03 - May/June (2003 vol. 20)
ISSN: 0740-7475
pp: 78-87
C. J. Clark , Intellitech Corp.
Mike Ricchetti , Intellitech Corp.
<p><em>Editor?s note:</em><div>Embedding infrastructure IP to optimize chip-level manufacturing test and debugging has recently become common practice. However, adopting the same approach for boards and systems requires a different family of infrastructure IP. This article introduces such a family and discusses how it can optimize manufacturing test and debugging, as well as support configurability, especially in today?s reconfigurable products.</div><div>--Yervant Zorian, Virage Log</div></p>

M. Ricchetti and C. J. Clark, "Infrastructure IP for Configuration and Test of Boards and Systems," in IEEE Design & Test of Computers, vol. 20, no. , pp. 78-87, 2003.
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