The Community for Technology Leaders
Green Image
TABLE OF CONTENTS
Issue No. 01 - January/February (vol. 20)
ISSN: 0740-7475

A 100-GOPS programmable processor for vehicle vision systems (Abstract)

W. Raab , Infineon Technol. AG, Munich, Germany
N. Bruels , Infineon Technol. AG, Munich, Germany
U. Hachmann , Infineon Technol. AG, Munich, Germany
J. Harnisch , Infineon Technol. AG, Munich, Germany
U. Ramacher , Infineon Technol. AG, Munich, Germany
C. Sauer , Infineon Technol. AG, Munich, Germany
A. Techmer , Infineon Technol. AG, Munich, Germany
pp. 8-15

Compilation approach for coarse-grained reconfigurable architectures (Abstract)

Jong-eun Lee , Seoul Nat. Univ., South Korea
Kiyoung Choi , Seoul Nat. Univ., South Korea
pp. 26-33

Instruction scheduler generation for retargetable compilation (Abstract)

O. Wahlen , Aachen Univ. of Technol., Germany
M. Hohenauer , Aachen Univ. of Technol., Germany
R. Leupers , Aachen Univ. of Technol., Germany
H. Meyr , Aachen Univ. of Technol., Germany
pp. 34-41

Testing and characterization of SDRAMs (Abstract)

J.E. Vollrath , Infineon Technol. AG, Munchen, Germany
pp. 42-50

2D test sequence generators (Abstract)

G. Mrugalski , Poznan Univ. of Technol., Poland
J. Tyszer , Poznan Univ. of Technol., Poland
pp. 51-59

An all-digital DFT scheme for testing catastrophic faults in PLLs (Abstract)

F. Azais , LIRMM, Univ. of Montpellier, France
Y. Bertrand , LIRMM, Univ. of Montpellier, France
M. Renovell , LIRMM, Univ. of Montpellier, France
pp. 60-67

Circuit-level considerations for mixed-signal programmable components (Abstract)

L. Carro , Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
M. Negreiros , Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
G.P. Jahn , Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
A.A. de Souza , Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
D.T. Franco , Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
pp. 76-84

Boundary scan test standards (Abstract)

P.J. Ashenden , Ashenden Designs, Stirling, SA, Australia
pp. 91-92
EIC Message
Features

Guest Editors' Introduction: Application-Specific Microprocessors (HTML)

Alex Orailoglu , University of California, San Diego
Alex Veidenbaum , University of California, Irvine
pp. 6-7

A 100-GOPS Programmable Processor for Vehicle Vision Systems (Abstract)

Wolfgang Raab , Infineon Technologies AG
Nico Bruels , Infineon Technologies AG
Ulrich Hachmann , Infineon Technologies AG
Jens Harnisch , Infineon Technologies AG
Ulrich Ramacher , Infineon Technologies AG
Christian Sauer , Infineon Technologies AG
Axel Techmer , Infineon Technologies AG
pp. 8-16

Application-Specific Instruction Memory Customizations for Power-Efficient Embedded Processors (Abstract)

Peter Petrov , University of California, San Diego
Alex Orailoglu , University of California, San Diego
pp. 18-25

Compilation Approach for Coarse-Grained Reconfigurable Architectures (Abstract)

Jong-eun Lee , Seoul National University
Kiyoung Choi , Seoul National University
Nikil D. Dutt , University of California, Irvine
pp. 26-33

Instruction Scheduler Generation for Retargetable Compilation (Abstract)

Oliver Wahlen , Aachen University of Technology
Manuel Hohenauer , Aachen University of Technology
Rainer Leupers , Aachen University of Technology
Heinrich Meyr , Aachen University of Technology
pp. 34-41
Special Features

Testing and Characterization of SDRAMs (Abstract)

J?erg E. Vollrath , Infineon Technologies AG
pp. 42-50

2D Test Sequence Generators (Abstract)

Grzegorz Mrugalski , Poznan University of Technology
Jerzy Tyszer , Poznan University of Technology
Janusz Rajski , Mentor Graphics
pp. 51-59

An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs (Abstract)

Florence Aza? , LIRMM, University of Montpellier
Yves Bertrand , LIRMM, University of Montpellier
Michel Renovell , LIRMM, University of Montpellier
Andr? Ivanov , University of British Columbia
Sassan Tabatabaei , University of British Columbia
pp. 60-67

Circuit-Level Considerations for Mixed-Signal Programmable Components (Abstract)

Luigi Carro , Universidade Federal do Rio Grande do Sul
Marcelo Negreiros , Universidade Federal do Rio Grande do Sul
Gabriel Parmegiani Jahn , Universidade Federal do Rio Grande do Sul
Ad?o Ant?nio de Souza Jr. , Universidade Federal do Rio Grande do Sul
Denis Teixeira Franco , Universidade Federal do Rio Grande do Sul
pp. 76-84
The Road Ahead

Error Tolerance (Abstract)

Andrew B. Kahng , University of California, San Diego
pp. 86-87
Panel Summarie

ITC 2002 Panels (Abstract)

pp. 88-90
Standards

Boundary Scan Test Standards (Abstract)

Peter J. Ashenden , Ashenden Designs
pp. 91-92
Conference Reports
Newsletters

DATC Newsletter (Abstract)

pp. 93

TTTC Newsletter (Abstract)

pp. 94-95
The Last Byte

Making the Best of Those Extra Transistors (Abstract)

Frank Vahid , University of California, Riverside
pp. 96
86 ms
(Ver 3.3 (11022016))