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Issue No. 01 - January/February (2003 vol. 20)
ISSN: 0740-7475
pp: 60-67
Florence Aza? , LIRMM, University of Montpellier
Yves Bertrand , LIRMM, University of Montpellier
Michel Renovell , LIRMM, University of Montpellier
Andr? Ivanov , University of British Columbia
Sassan Tabatabaei , University of British Columbia
<p>Traditional functional testing of mixed-signal ICs is slow and requires costly, dedicated test equipment. The authors update the standard PLL architecture to allow simple digital testing. The all-digital strategy yields catastrophic fault coverage as high as that of the classical functional test, plus it is fast, extremely simple to implement, and requires only standard digital test equipment.</p>
Florence Aza?, Yves Bertrand, Michel Renovell, Andr? Ivanov, Sassan Tabatabaei, "An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs", IEEE Design & Test of Computers, vol. 20, no. , pp. 60-67, January/February 2003, doi:10.1109/MDT.2003.1173054
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