Issue No. 01 - January/February (2003 vol. 20)
Jong-eun Lee , Seoul National University
Kiyoung Choi , Seoul National University
Nikil D. Dutt , University of California, Irvine
<p>Coarse-grained reconfigurable architectures can enhance the performance of critical loops and computation-intensive functions. Such architectures need efficient compilation techniques to map algorithms onto customized architectural configurations. A new compilation approach uses a generic reconfigurable architecture to tackle the memory bottleneck that typically limits the performance of many applications.</p>
J. Lee, K. Choi and N. D. Dutt, "Compilation Approach for Coarse-Grained Reconfigurable Architectures," in IEEE Design & Test of Computers, vol. 20, no. , pp. 26-33, 2003.