Issue No.04 - July/August (2002 vol.19)
Published by the IEEE Computer Society
<p>The design automation conference is the premier forum for members of the electronic design industry to exchange information on products, methodologies, and processes. Its attendees include more than 15,000 developers, designers, researchers, managers, and engineers from leading electronics companies and universities around the world. With more than 50 exhibitors, DAC offers a robust technical program covering the electronics industry?s hottest trends.</p>
The Design Automation Conference is the premier forum for members of the electronic design industry to exchange information on products, methodologies, and processes. Its attendees include more than 15,000 developers, designers, researchers, managers, and engineers from leading electronics companies and universities around the world. With more than 250 exhibitors, DAC offers a robust technical program covering the electronics industry's hottest trends.
The 39th DAC, held 10 to 14 June in New Orleans, covered significant issues in all areas of IC and system design, including
• the challenges of designing embedded systems;
• new approaches for handling increasing IC complexity, power consumption, and distribution; and
• the reemergence of analog design.
Embedded systems are undoubtedly a large part of the future of design. One question is whether hardware-software codesign can be successful in the embedded space. Other challenges include effective power optimization techniques and new languages for embedded-system specification, design, and verification. These issues will determine the future of embedded systems.
Along with the resurgence of embedded systems, there is also a continual explosion in IC complexity. As chip complexity increases, so do the number and length of necessary verification steps. Formal and semiformal verification promise faster time to market through new technologies and approaches. But despite the introduction of such approaches, the learning curve remains steep.
Power consumption and distribution constitute another design roadblock. Voltage scaling and multithreshold-voltage schemes can help minimize power. Energy efficiency is critical in embedded systems, which are often battery operated. New methods for achieving efficiency include exploration of improved scheduling and memory management techniques. Another concern is the increasing difficulty of limiting power dissipation and wasted power—a difficult task as integration increases. To compensate, designers need smarter tools to address power and performance tradeoffs, especially for mobile devices.
Analog design is also entering the mainstream, with the proliferation of communication products. A lack of designers with analog expertise and a very steep learning curve have spawned a need for increased design automation in this area. The holy grail is to synthesize analog and mixed-signal circuits. Despite some progress, complete success in this area may elude the industry for some time. One of the steps toward achieving such success is to create abstract modeling techniques for analog design.
This Special Section
This year, in close cooperation with D&T EIC Rajesh Gupta, the DAC Technical Program Committee has chosen some of the most significant articles from the technical program to present in this special DAC section. The goal is to give you an overview of the hottest areas in electronic design automation, as well as a selection of some significant and practical advances in CAD and design methods.
We selected the articles in this special section that we felt would be of general interest to D&T readers, with an emphasis on rapid applicability of results. In addition, each article includes a special sidebar by a leading expert in the field. The first article, by Michael Perrott, discusses behavioral simulation of analog circuits, particularly phase- and delay-locked loops. The next article, by Robert Siegmund and Dietmar Müller, describes synthesis of hardware interface controllers from protocols.
In the third article, Kanna Shimizu and David Dill explain how to use formal verification techniques for functional verification of hardware modules. Next, Alex Kondratyev and Kelvin Lwin focus on synthesizing asynchronous circuits using standard synchronous CAD tools. Finally, Kanishka Lahiri, Anand Raghunathan, and Sujit Dey discuss architectural techniques for low-power design. We hope you enjoy this special DAC section.
David Blaauw is an associate professor in the Department of Electrical Engineering and Computer Science at the University of Michigan. His research interests include VLSI design and CAD, with particular emphasis on circuit analysis and optimization problems for high-performance and low-power designs. Blaauw has a BS in physics and computer science from Duke University, and an MS and PhD in computer science from the University of Illinois at Urbana-Champaign. He was the technical program co-chair for the 2001 and 2002 Design Automation Conferences. He is a member of the IEEE and the ACM.
Luciano Lavagno is an associate professor in the Department of Electronics at Politecnico di Torino, Italy, and a research scientist at Cadence Berkeley Laboratories. His research interests include synthesis of asynchronous and low-power circuits, concurrent design of mixed hardware and software embedded systems, and formal verification of digital systems. Lavagno has a BS in electrical engineering from Politecnico di Torino and a PhD in electrical engineering and computer science from the University of California at Berkeley. He is a member of the IEEE. He has also served on the technical committees of several international conferences, including the Design Automation Conference.