Issue No. 04 - July/August (2002 vol. 19)
<p>The programmable cores on SoCs can perform on-chip test generation, measurement, response analysis, and even diagnosis. This software-based approach to self-testing enables at speed testing and incurs low DFT overhead. With the growing popularity of system-on-a-chip (SoC) architectures, demands for short time to market and rich functionality have driven design houses to adopt a new core-based So design flow. Core-based SoC incorporates multiple complex, heterogeneous components on a single piece of silicon; these can include digital, analog, mixed signal, RF, micromechanical, and other kinds of systems. This blurring of the boundaries between different types of devices, together with rapidly increasing operational frequencies and shrinking feature sizes, has introduced a whole new set of testing challenges. The programmable cores on SoCs can perform on-chip test generation, measurement, response analysis, and even diagnosis. This software-based approach to self-testing enables at-speed testing and incurs low DFT overhead.</p>
A. Krstic, W. Lai, K. Cheng, L. Chen and S. Dey, "Embedded Software-Based Self-Test for Programmable Core-Based Designs," in IEEE Design & Test of Computers, vol. 19, no. , pp. 18-27, 2002.