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Issue No. 02 - March/April (2002 vol. 19)
ISSN: 0740-7475
pp: 24-33
Zhanping Chen , Intel, Hillsboro, OR, USA
ABSTRACT
The use of low-threshold devices in scaled low-voltage CMOS circuits leads to increased intrinsic leakage current. As a result, I/sub DDQ/ testing requires different techniques to remain effective.
INDEX TERMS
leakage currents, integrated circuit testing, CMOS integrated circuits, low-power electronics
CITATION

Zhanping Chen, Liqiong Wei, A. Keshavarzi and K. Roy, "I/sub DDQ/ testing for deep-submicron ICs: challenges and solutions," in IEEE Design & Test of Computers, vol. 19, no. 2, pp. 24-33, .
doi:10.1109/54.990439
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