Issue No. 02 - March/April (2002 vol. 19)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.990439
Zhanping Chen , Intel, Hillsboro, OR, USA
The use of low-threshold devices in scaled low-voltage CMOS circuits leads to increased intrinsic leakage current. As a result, I/sub DDQ/ testing requires different techniques to remain effective.
leakage currents, integrated circuit testing, CMOS integrated circuits, low-power electronics
Zhanping Chen, Liqiong Wei, A. Keshavarzi and K. Roy, "I/sub DDQ/ testing for deep-submicron ICs: challenges and solutions," in IEEE Design & Test of Computers, vol. 19, no. 2, pp. 24-33, .