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Issue No. 06 - November/December (2001 vol. 18)
ISSN: 0740-7475
pp: 12-22
<p>Addressing fundamental challenges to designing high-performance ICs in nanometer-scale technologies, the authors advocate a flexible approach to limiting both dynamic and static power. They recommend global-signaling strategies to curb communication power requirements and thermal management techniques to ease the burden on packaging.</p>
Himanshu Kaul, Dennis Sylvester, "Power-Driven Challenges in Nanometer Design", IEEE Design & Test of Computers, vol. 18, no. , pp. 12-22, November/December 2001, doi:10.1109/54.970420
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