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Issue No. 03 - May/June (2001 vol. 18)
ISSN: 0740-7475
pp: 16-27
ABSTRACT
Large on-chip memories are desirable but difficult to implement. Challenges range from design automation to fabrication to test algorithms and memory redundancy and repair.
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CITATION

R. Rajsuman, "Design and Test of Large Embedded Memories: An Overview," in IEEE Design & Test of Computers, vol. 18, no. , pp. 16-27, 2001.
doi:10.1109/54.922800
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