Issue No. 01 - January/February (2001 vol. 18)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.902823
Modeling a commercial verification test system enables simulated tests to be performed before actual testing with instruments and enhances communication between designers and test engineers.
H. Kerkhoff, D. San Segundo Bello and R. Tangelder, "Modeling a Verification Test System for Mixed-Signal Circuits," in IEEE Design & Test of Computers, vol. 18, no. , pp. 63-71, 2001.