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Due to the high cost of correcting errors in a final product, there is a growing impetus in the industry towards methodologies that can yield correct designs in the first manufacturing run. Design validation methodologies that combine simulation techniques with formal reasoning can be effective in ensuring correct operation of software and hardware systems. We present a validation methodology for PowerPC custom memories based on symbolic simulation and present results on an industrial project at Somerset. We also show why simulation is necessary to complement formal mathematical reasoning in verifying certain classes of custom designed circuits. We then present our results and outline our goals in the areas of design validation using symbolic simulation.

M. S. Abadir, A. K. Martin, J. A. Abraham and N. Krishnamurthy, "Validating PowerPC Microprocessor Custom Memories," in IEEE Design & Test of Computers, vol. 17, no. , pp. 61-76, 2000.
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