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ABSTRACT
<p>Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The controller extraction algorithm uses an approach that frees it from restrictions on HDL code writing style.</p>
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CITATION

J. Jou and C. J. Liu, "An Automatic Controller Extractor for HDL Descriptions at the RTL," in IEEE Design & Test of Computers, vol. 17, no. , pp. 72-77, 2000.
doi:10.1109/54.867897
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