Issue No. 04 - October-December (1998 vol. 15)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.735925
A target structure for implementing fast online testable control units for data-dominated applications is presented. In many cases, the proposed controller structure leads to a performance improvement of more than 30% for a standard benchmark set whereas the area overhead is less than 15% compared with conventional on-line testable finite state machines (FSM). The proposed approach is compatible with the state-of-the-art methods for FSM decomposition, state encoding and logic synthesis.
synthesis of online testable FSMs, performance driven synthesis, FSM synthesis
Hans-Joachim Wunderlich, Andre Hertwig, Sybille Hellebrand, "Synthesizing Fast, Online-Testable Control Units", IEEE Design & Test of Computers, vol. 15, no. , pp. 36-41, October-December 1998, doi:10.1109/54.735925