Issue No.04 - October-December (1997 vol.14)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.632882
Although a number of DSP cores are currently available for application-specific IC design, they typically offer limited possibilities for customizing the core itself. In our approach, a parameterized and extensible DSP core was designed. This new breed of licensable DSP cores offers a great deal of flexibility for the system engineers in their attempt to find the optimum cost/performance ratio for a given application. Among variable data word width and the number of registers, a wide range of other core parameters can be specified. Moreover, the core features an extensible instruction set which supports execution of special operations in the datapath or in the off-core custom hardware. With the extension instructions and additional circuitry, it is possible to fine-tune the instruction set for specific needs of the modern signal processing applications. In this article, we present the flexible DSP core architecture and the software development tools supporting design space exploration. Finally, the benefits of this approach are illustrated with an application example, in which the algorithms of the GSM full rate speech coding were implemented with four different core configurations.
DSP cores, core-based systems, systems on a chip
Mika Kuulusa, Jari Nurmi, Janne Takala, Pasi Ojala, Henrik Herranen, "A Flexible DSP Core for Embedded Systems", IEEE Design & Test of Computers, vol.14, no. 4, pp. 60-68, October-December 1997, doi:10.1109/54.632882