Issue No. 04 - October-December (1997 vol. 14)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.632879
A system design to physical design methodology based on developing and integrating reusable "cores" was used to develop a complex 0.5-micron digital QAM demodulator/FEC decoder. This highly automated design flow encapsulates ESDA tools, logic synthesis and standard cell place and route tools into a Make/RCS environment that simplifies design complexity management and brings in physical design information early in the design cycle. This methodology enables a new style of design team organization in which each designer is responsible for all aspects of core development, from system level architecture through place and route and post-layout timing verification. This methodology facilitates design re-use and greatly reduces the cycle time of complex deep submicron designs.
Core-based systems, systems on a chip, design flow, deep-submicron design
Frank S. Eory, "A Core-Based System-to-Silicon Design Methodology", IEEE Design & Test of Computers, vol. 14, no. , pp. 36-41, October-December 1997, doi:10.1109/54.632879