Issue No. 02 - April-June (1997 vol. 14)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.587742
<p>Circuit designers can efficiently verify designs at the bit and word levels in one graph-based data structure. The authors present the representation technique, manipulation algorithms for K*BMDs, and experimental results comparing them with other data structures.</p>
R. Drechsler, B. Becker and S. Ruppertz, "The K*BMD: A Verification Data Structure," in IEEE Design & Test of Computers, vol. 14, no. , pp. 51-59, 1997.