Issue No. 01 - January-March (1997 vol. 14)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.573354
<p>Yield is perhaps the single most important measure of manufacturing efficiency for large integrated circuits. To reduce product time-to-volume and accelerate continuous yield improvement, we have integrated memory test, defect mapping, and repair into the UltraSPARC microprocessor manufacturing flow.</p> <p>We use the UltraSPARC memory test port, together with standard memory test equipment and integrated software to detect, locate, and repair defects in the larger memory arrays. Pattern-recognized memory defect maps are collected for every chip manufactured, accelerating the understanding of defects and their causes. As part of the manufacturing process, we also program a unique identity into each chip that can be read electrically. In this article, we present the memory defect-mapping system that has been established and our use of that system to accelerate yield learning.</p>
IC design, defect mapping, defect repair, embedded memory, UltraSPARC, manufacturing
S. Paramanandam and L. Youngs, "Mapping and Repairing Embedded-Memory Defects," in IEEE Design & Test of Computers, vol. 14, no. , pp. 18-24, 1997.