Issue No. 03 - Fall (1996 vol. 13)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.536094
This article describes a design for testability process, which is highly automated, hierarchical, and spans the entire life cycle. The process was developed for the DoD's RASSP Program and contributes significantly to the RASSP goals of 4x improvement in cycle time, design quality, and life cycle costs.
BIST, design for testability, rapid prototyping, RASSP, signal processors, test strategy
John S. Evans, Richard M. Sedmak, "Spanning the Product Life Cycle: RASSP DFT", IEEE Design & Test of Computers, vol. 13, no. , pp. 32-42, Fall 1996, doi:10.1109/54.536094