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Issue No. 04 - Winter (1995 vol. 12)
ISSN: 0740-7475
pp: 45-51
<p>Applying scan-based DFT, I<sub>DDQ</sub> testing, or both to sequential circuits does not ensure bridging-fault detection, which depends on the resistance of the fault and circuit level parameters. With a “transparent” scan chain, however, the tester can use both methods to detect manufacturing process defects effectively—including difficult-to-detect shorts in the scan chain. The author presents a strategy for making the scan chain transparent. The test complexity of such a chain is very small, regardless of the number of flip-flops it contains.</p>

M. Sachdev, "Testing Defects in Scan Chains," in IEEE Design & Test of Computers, vol. 12, no. , pp. 45-51, 1995.
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