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We propose an efficient method to identify untestable faults in sequential circuits. The method is based on a controllability calculation and a symbolic simulation procedure which propagates the characteristics of unknown initial states of flip-flops throughout the circuit. The obtained information is used to identify the flip-flops which cannot be initialized and the circuit lines which cannot be justified to definite values. The untestable faults are classified into four types and each type of them is identified efficiently by using the described rules. The method has been experimentally incorporated into a test generation system and the results show that it is very useful in identifying untestable faults and improving efficiency of a test generation system.
untestable faults, controllability, initializable, invalid states, test generation

J. E. Chen, C. Len Lee and H. Liang, "Identifying Untestable Faults in Sequential Circuits," in IEEE Design & Test of Computers, vol. 12, no. , pp. 14-23, 1995.
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