Issue No. 01 - January/March (1994 vol. 11)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.262321
<p>Incorporating test and fault diagnosis as critical design requirements is necessary to achieve high-quality, cost-effective multichip systems. However, evaluating where and when to test, and deciding upon the best test method and level, take considerable study. The authors explore the trade-offs between various MCM test and rework strategies, then analyze the impact of cost, yield, and test effectiveness of the final cost and quality. This analysis of the trade-offs associated with test strategies for complex multichip systems and modules clearly indicate that incorporating DFT and BIST with varying degrees at the chip or MCM levels is economically justifiable. These methods result in cost reduction as well as quality improvement, and indicate that the MCM cost could vary by about 10% to 20%, depending on the test strategy used. However, proper determination of where and how to test, and whether to employ DFT and BIST at the IC or MCM levels, require an evaluation of the economics of the various solutions and the payback. This process is highly dependent on the design under consideration and the parameters associated with the available manufacturing environments.</p>
K. Drake, M. S. Abadir, A. R. Parikh, P. A. Sandborn and L. Bal, "Analyzing Multichip Module Testing Strategies," in IEEE Design & Test of Computers, vol. 11, no. , pp. 40-52, 1994.