Issue No. 03 - July/September (1993 vol. 10)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.232474
<p>Procedure 5012 of Mil-Std-883, which describes requirements for the logic model, the assumed fault model and universe, fault classing, fault simulation and reporting of test results for digital microcircuits is described. The procedure provides a consistent means of measuring fault coverage regardless of the specific logic and fault simulator used. Procedure 5012 addresses complex, embedded structures such as random-access memories (RAMs), read-only memories (ROMs), and programmable logic arrays (PLAs) weighting gate-level and non-gate-level structures by transistor counts to arrive at overall fault coverage.</p>
K. A. Kwiat, S. A. Al-Arian and W. H. Debany Jr., "A Method for Consistent Fault Coverage Reporting," in IEEE Design & Test of Computers, vol. 10, no. , pp. 68-79, 1993.