Issue No. 02 - April/June (1993 vol. 10)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.211524
<p>A rapid failure analysis method for high-density CMOS static RAMs (SRAMs) that uses realistic defect modeling and the results of functional and I/sub DDQ/ testing is presented. The key to the method is the development of a defect-to-signature vocabulary through inductive fault analysis. Results indicate that the method can efficiently debug the multimegabit-memory manufacturing process.</p>
S. Naik, F. Agricola and W. Maly, "Failure Analysis of High-Density CMOS SRAMs: Using Realistic Defect Modeling and I/Sub DDQ/ Testing," in IEEE Design & Test of Computers, vol. 10, no. , pp. 13-23, 1993.