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Issue No. 04 - October/December (1991 vol. 8)
ISSN: 0740-7475
pp: 18-23
<p>A step-by-step methodology for debugging and solving wafer sort and final-test prototype failures in application-specific integrated circuits (ASICs) is provided. The uses of schmoo plots, datalogs, and fault analysis are described, and a checklist for investigating problems is given. Most of the work can take place at the remote site, using simulators, schematics, and standard information provided by the test engineer.</p>
David A. Fechser, "A Methodology for Debugging ASIC Prototypes in the Field", IEEE Design & Test of Computers, vol. 8, no. , pp. 18-23, October/December 1991, doi:10.1109/54.107202
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