Issue No. 01 - January/March (1991 vol. 8)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.75665
<p>A VLSI coprocessor that radically improves the real-time performance of the Ada tasking model, especially the rendezvous, is discussed. An overview of multilevel design is given, and design levels and models are examined. A description is given of the design strategy, which entails stepwise refinement of functional models representing the coprocessor at more and more detailed levels. A chip was generated using the Genesil silicon compiler, but most of the design was defined and verified on the instruction-set-processor and register-transfer levels.</p>
J. Roos, "Designing a Real-Time Coprocessor for Ada Tasking," in IEEE Design & Test of Computers, vol. 8, no. , pp. 67-79, 1991.