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<p>The Cones synthesis system for automatic generation of VLSI implementations is discussed. Named for the cones in sequential logic, Cones takes behavioral models written in C and produces gate-level implementations in technologies such as standard cells and programmable logic arrays or programmable logic devices. The overall design is produced faster, more efficiently, and with fewer errors. Designers are free to concentrate on functions, instead of on the details of the implementation technology.</p>

R. R. Munoz, C. E. Stroud and D. A. Pierce, "Behavioral Model Synthesis with Cones," in IEEE Design & Test of Computers, vol. 5, no. , pp. 22-30, 1988.
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