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Issue No. 06 - November/December (vol. 4)
ISSN: 0740-7475

1987 D&T Referees (PDF)

pp. 59

Table of Contents (PDF)

pp. c2-1

Editorial Board (PDF)

pp. 2

D&T Letters (PDF)

pp. 3

Correction (PDF)

pp. 3

The Computer Society (PDF)

pp. 64c

Call for Papers (PDF)

pp. 64

Top-Down Layout for Hierarchical Custom Design (Abstract)

K. Ueda , LSI Laboratories, NTT
H. Kitazawa , LSI Laboratories, NTT
T. Adachi , LSI Laboratories, NTT
I. Harada , LSI Laboratories, NTT
pp. 22-29

Testing And Applications of Inverter-Free PLAs (Abstract)

Janusz Rajski , McGill University
Vinod Agarwal , McGill University
pp. 30-40

Parallel Discrete-Event Simulation (Abstract)

Walid Najjar , University of Southern California
Jean-luc Jezouin , University of Southern California
Jean-luc Gaudiot , University of Southern California
pp. 41-44

D&T Calendar (PDF)

pp. 45-50

D&T Scene (PDF)

pp. 46-48

Industry Briefs (PDF)

pp. 49

New Products Design (PDF)

pp. 51-53

New Products Test (PDF)

pp. 54-56

D&T Conferences (PDF)

pp. 57-58

Annual Index (PDF)

pp. 60-63

IEEE Design&Test of Computers (PDF)

pp. 64-a-64-b

The Computer Society (PDF)

pp. 64-c

Call for Papers (PDF)

pp. 64-d
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