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Issue No. 01 - January/February (vol. 4)
ISSN: 0740-7475

A Conference Preview (PDF)

pp. 1

Editorial Board (PDF)

pp. 3

Editorial Board (PDF)

pp. 4

D&T Letters (PDF)

pp. 5

D&T Forum (PDF)

pp. 6-7

D&T Scene (PDF)

pp. 8-9

Design Automation (PDF)

pp. 10-11

Design Version Management (Abstract)

Vony Trijanto , University of California, Berkeley
Rajiv Bhateja , University of California, Berkeley
Randy Katz , University of California, Berkeley
Ellis Chang , University of California, Berkeley
David Gedye , University of California, Berkeley
pp. 12-22

Call for Papers (PDF)

pp. 23

Efficient Spare Allocation for Reconfigurable Arrays (Abstract)

W. Fuchs , University of Illinois
Sy-yen Kuo , University of Illinois
pp. 24-31

Flute an Expert Floor Planner for Full-Custom VLSI Design (Abstract)

Hiroyuki Watanabe , University of North Carolina Bryan Ackland, AT&T Bell Laboratories
pp. 32-41

Built-In Self-Testing RAM: A Practical Alternative (Abstract)

Kozo Kinoshita , Hiroshima University
Kewal Saluja , University of Wisconsin
Siew Sng , Reliability Singapore
pp. 42-51

Hey You! (PDF)

pp. 51

Scan Design Using Standard Flip-Flops (PDF)

R. Dandapani , University of Colorado
Sudhakar Reddy , University of Iowa
pp. 52-54

D&T Roundtable (PDF)

pp. 55-59

D&T Conferences (PDF)

pp. 60-62

New Products Design (PDF)

pp. 63-65

New Products Test (PDF)

pp. 66-67

Call for Papers (PDF)

pp. 70

Book Reviews (PDF)

pp. 71

IEEE Design&Test of Computers (PDF)

pp. 72-a-72-b
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