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Issue No. 01 - January/February (vol. 3)
ISSN: 0740-7475

IEEE Computer Society (PDF)

pp. 4

Editorial Board (PDF)

pp. 5

D&T Scene (PDF)

pp. 6-9

Erratum (PDF)

pp. 9

Sampling Quality (PDF)

pp. 10-11

Call for Papers (PDF)

pp. 96c

The CMU-CAM System (Abstract)

Andrzej Strojwas , Carnegie-Mellon University
pp. 35-44

An Automatic DFT System for the Silc Silicon Compiler (Abstract)

H.s. Fung , GTE Laboratories, Inc.
S. Hirschhorn , GTE Laboratories, Inc.
pp. 45-57

Automatic Generation of Digital System Schematic Diagrams (Abstract)

Anshul Kumar , Indian Institute of Technology, Delhi
Anjali Arya , Indian Institute of Technology, Delhi
V.V. Swaminathan , Indian Institute of Technology, Delhi
Amit Misra , Indian Institute of Technology, Delhi
pp. 58-65

Hierarchical Analysis of IC Artwork with User-Defined Rules (Abstract)

Louis Scheffer , Valid Logic Systems, Inc.
Ronny Soetarman , Valid Logic Systems, Inc.
pp. 66-74

The VIVID Symbolic Design System: Current Overview And Future Directions (Abstract)

C. Rogers , Microelectronics Center of North Carolina
pp. 75-81

D&T Conferences (PDF)

pp. 82-87

New Products Test (PDF)

Conrad Zagwyn , International Test Conference, 295 Valley St., Pembroke, MA 02359
pp. 88-90

New Products Design (PDF)

J. Nash , Raytheon Co., Missile Systems Div., Hartwell Rd., Bedford, MA 01730
pp. 91-92

Calendar (PDF)

pp. 93

D&T Education (PDF)

pp. 94

Book Reviews (PDF)

Robert Anderson , GenRad Inc., PO Box 32183, Phoenix, AZ 85064
pp. 95

IEEE Design&Test of Computers (PDF)

pp. 96-a-96-b

Call for Papers (PDF)

pp. 96-c
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