Issue No. 02 - Mar.-Apr. (2017 vol. 19)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MCSE.2017.33
Kwabena Boahen , Stanford University
As transistors shrink to nanoscale dimensions, trapped electrons - blocking "lanes" of electron traffic - are making it difficult for digital computers to work. In stark contrast, the brain works fine with single-lane nanoscale devices that are intermittently blocked (ion channels). Conjecturing that it achieves error-tolerance by combining analog dendritic computation with digital axonal communication, neuromorphic engineers (neuromorphs) began emulating dendrites with subthreshold analog circuits and axons with asynchronous digital circuits in the mid-1980s. Three decades in, researchers achieved a consequential scale with Neurogrid - the first neuromorphic system that has billions of synaptic connections. Researchers then tackled the challenge of mapping arbitrary computations onto neuromorphic chips in a manner robust to lanes intermittently - or even permanently - blocked by trapped electrons. Having demonstrated scalability and programmability, they now seek to encode continuous signals with spike trains in a manner that promises greater energy efficiency than all-analog or all-digital computing across a five-decade precision range.
Transistors, Neuromorphics, Energy efficiency, Three-dimensional displays, Digital communication, Neural networks, Nanoscale devices, Neuroscience, Very large scale integration, Moore's Law
K. Boahen, "A neuromorph's prospectus," in Computing in Science & Engineering, vol. 19, no. 2, pp. 14-28, 2017.