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Issue No. 08 - August (2012 vol. 45)
ISSN: 0018-9162
pp: 53-61
Simone Secchi , Pacific Northwest National Laboratory
Antonino Tumeo , Pacific Northwest National Laboratory
Oreste Villa , Pacific Northwest National Laboratory
ABSTRACT
Massively multithreaded architectures like the Cray XMT address the needs of irregular data-intensive applications better than commodity clusters. A proposed evolution of the XMT integrates multicore processors and next-generation interconnects, along with memory reference aggregation to optimize network utilization. The featured Web extra is a video interview with Center for Adaptive Supercomputing Software-Multithreaded Architectures (CASS-MT) Project Director John Feo, who discusses irregular applications and research on massively multithreaded architectures. YouTube URL: http://youtu.be/QxAgOGbp8qA
INDEX TERMS
Instruction sets, Bandwidth, Memory management, Peer to peer computing, Multicore processing, Benchmark testing, High performance computing, Multiprocessing systems, Multithreading, high-performance computing, massively multithreaded architectures, Cray XMT, multithreaded processors
CITATION
Simone Secchi, Antonino Tumeo, Oreste Villa, "Designing Next-Generation Massively Multithreaded Architectures for Irregular Applications", Computer, vol. 45, no. , pp. 53-61, August 2012, doi:10.1109/MC.2012.193
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