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Issue No. 01 - January (2004 vol. 37)
ISSN: 0018-9162
pp: 118-120
David Andrews , University of Kansas
Peter Ashenden , Ashenden Designs
Douglas Niehaus , University of Kansas
ABSTRACT
<p>Components that combine a CPU and reconfigurable logic gates need a programming model that abstracts the computational hardware.</p>
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CITATION
David Andrews, Peter Ashenden, Douglas Niehaus, "Programming Models for Hybrid CPU/FPGA Chips", Computer, vol. 37, no. , pp. 118-120, January 2004, doi:10.1109/MC.2004.1260732
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