Issue No. 01 - January (2004 vol. 37)
David Andrews , University of Kansas
Douglas Niehaus , University of Kansas
Peter Ashenden , Ashenden Designs
<p>Components that combine a CPU and reconfigurable logic gates need a programming model that abstracts the computational hardware.</p>
D. Andrews, P. Ashenden and D. Niehaus, "Programming Models for Hybrid CPU/FPGA Chips," in Computer, vol. 37, no. , pp. 118-120, 2004.