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Issue No. 04 - April (2003 vol. 36)
ISSN: 0018-9162
pp: 60-67
Kai Richter , Technical University of Braunschweig
Marek Jersak , Technical University of Braunschweig
Rolf Ernst , Technical University of Braunschweig
<p>Multiprocessor system on chip designs use complex on-chip networks to integrate different programmable processor cores, specialized memories, and other components on a single chip. </p><p>MpSoCs have become the architecture of choice in many industries. Their heterogeneity inevitably increases with intellectual-property integration and component specialization. System integration is becoming a major challenge in their design. </p><p>Simulation is state of the art in MpSoC performance verification, but it has conceptual disadvantages that become disabling as complexity increases. Formal approaches offer a systematic alternative.</p>

K. Richter, R. Ernst and M. Jersak, "A Formal Approach to MpSoC Performance Verification," in Computer, vol. 36, no. , pp. 60-67, 2003.
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