Issue No. 02 - February (2003 vol. 36)
Thin-Fong Tsuei , Sun Microsystems
Wayne Yamamoto , Sun Microsystems
<p>The processor queuing model provides memory-hierarchy and system-design evaluation of memory-intensive commercial online-transaction-processing workloads on large multi-processor systems. It differs from detailed cycle-accurate and direct-execution simulations in that it does not simulate instruction execution. Instead, as in analytical models, the authors build processor and workload characteristics that are easy to collect and estimate.</p><p>Because the authors believe that the processor model's function is to accurately generate memory traffic to the rest of the system, they model a minimal set of processor and workload characteristics that captures the important interactions between a complex processor and the system-memory hierarchy.</p>
W. Yamamoto and T. Tsuei, "Queuing Simulation Model for Multiprocessor Systems," in Computer, vol. 36, no. , pp. 58-64, 2003.