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Issue No. 04 - April (2001 vol. 34)
ISSN: 0018-9162
pp: 59-65
<p>For nearly 20 years, microarchitecture research has emphasized instruction-level parallelism (ILP), which improves performance by increasing the number of instructions per cycle. In striving for such parallelism, researchers have exploited advances in chip technology to develop complex, hardware-intensive processors. This trend has resulted in high intellectual complexity in the increasingly intricate schemes for squeezing performance out of second- and third-order effects. </p> <p>To simplify these increasingly complex designs, developers can borrow distributed- systems methods and apply them at the processor level to solve load balance, resource allocation, and communication problems. The current focus on ILP will likely shift to instruction-level distributed processing, emphasizing inter-instruction communication with dynamic optimization and a tight interaction between hardware and low-level software. To help find runtime parallelism, orchestrate distributed hardware resources, and implement power conservation strategies, an additional layer of abstraction-- the virtual machine layer--will likely become an essential ingredient. Finally, new instruction sets may be necessary to better focus on instruction-level communication and dependence, rather than computation and independence as is commonly done today. </p>
James E. Smith, "Instruction-Level Distributed Processing", Computer, vol. 34, no. , pp. 59-65, April 2001, doi:10.1109/2.917541
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