Issue No. 11 - November (1999 vol. 32)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/2.803642
<p>Test development can be tedious and time-consuming, sometimes stretching over several months for complex designs. In the past two decades, various test development automation tools have attempted to address this problem and reduce the bottleneck in the product's time to market. These tools, which automate dozens of tasks essential for developing adequate tests, generally fall into four categories: design for testability (DFT), test pattern generation, pattern-grading, and test program development and debugging. The focus in this article is on automatic test-pattern- generation tools. Researchers have looked primarily at issues such as scalability, ability to handle various fault models, and how to extend the algorithms beyond Boolean domains to handle different abstraction levels. Their aims were to speed up test generation, reduce test sequence length, and minimize power consumption. As design trends move toward nanometer technology, however, new ATPG problems are emerging. Current modeling and vector generation techniques must give way to new techniques that consider timing information during test generation, scale to larger designs, and can capture extreme design conditions. The authors describe current ATPG techniques and efforts to adapt ATPG technology to handle deep-submicron faults and to identify design errors and timing problems during design verification. </p>
K. Cheng and A. Krstic, "Current Directions in Automatic Test-Pattern Generation," in Computer, vol. 32, no. , pp. 58-64, 1999.