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<p>A packaging system design process for multichip modules (MCMs) is presented. The performance factors, cost factors, alternative packaging technologies, and packaging alternatives for daughter cards are discussed. The process is illustrated by applying to the design of a 80386SL chip that contains a 32-b integer central processing unit (CPU), memory management, bus control, and buffering, and a 82360SL companion chip that contains control functions for the system, I/O, peripherals, power management, and a majority of the glue logic required by the system.</p>
Paul D. Franzon, Robert J. Evans, "A Multichip Module Design Process for Notebook Computers", Computer, vol. 26, no. , pp. 41-49, April 1993, doi:10.1109/2.206512
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