Issue No. 02 - February (1988 vol. 21)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/2.18
<p>The authors describe a parallel processing architecture for real-time digital signal processing that has demonstrated virtually 100% data processing efficiency in a number of areas. The Teamed-Architecture Signal Processor (T-ASP) is a field-proven, commercially available optimal system solution to the extremely high computational and I/O rates encountered in modern digital-signal-processing environments. The design of T-ASP involves the consideration and implementation of many architectural concepts used to enhance the performance of a computer, including programmability, parallel processing, vector processing and pipelining, memory interleaving, double cache memories, multiple high-speed I/O interfaces, and segmentation of the processors for elimination of both CPU and data-handling overhead. The authors discuss hardware architecture design and implementation; hardware management; and software architecture design and implementation.</p>
"An Optimum Parallel Architecture for High-Speed Real-Time Digital Signal Processing," in Computer, vol. 21, no. , pp. 47-57, 1988.