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TABLE OF CONTENTS
Issue No. 01 - Jan.-June (vol. 16)
ISSN: 1556-6056

Cache Calculus: Modeling Caches through Differential Equations (Abstract)

Nathan Beckmann , MIT CSAIL, Cambridge, MA
Daniel Sanchez , MIT CSAIL, Cambridge, MA
pp. 1-5

CARB: A C-State Power Management Arbiter for Latency-Critical Workloads (Abstract)

Xin Zhan , Brown University, Providence, RI
Reza Azimi , Brown University, Providence, RI
Svilen Kanev , Harvard University, Cambridge, MA
David Brooks , Harvard University, Cambridge, MA
Sherief Reda , Brown University, Providence, RI
pp. 6-9

CasHMC: A Cycle-Accurate Simulator for Hybrid Memory Cube (Abstract)

Dong-Ik Jeon , Department of Electronic and Computer Engineering, Hanyang University, SeoulKorea
Ki-Seok Chung , Department of Electronic and Computer Engineering, Hanyang University, SeoulKorea
pp. 10-13

Cloud Server Benchmark Suite for Evaluating New Hardware Architectures (Abstract)

Hao Wu , Princeton University, Princeton, NJ
Fangfei Liu , Princeton University, Princeton, NJ
Ruby B. Lee , Princeton University, Princeton, NJ
pp. 14-17

Counter-Based Tree Structure for Row Hammering Mitigation in DRAM (Abstract)

Seyed Mohammad Seyedzadeh , Department of Computer Science, University of Pittsburgh, Pittsburgh, PA
Alex K. Jones , Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA
Rami Melhem , Department of Computer Science, University of Pittsburgh, Pittsburgh, PA
pp. 18-21

Covert Channels on GPGPUs (Abstract)

Hoda Naghibijouybari , Department of Computer Science and Engineering, University of California, Riverside, CA
Nael Abu-Ghazaleh , Department of Computer Science and Engineering, University of California, Riverside, CA
pp. 22-25

Evaluation of Performance Unfairness in NUMA System Architecture (Abstract)

Wonjun Song , KAIST, Daejeon, South Korea
Hyung-Joon Jung , KAIST, Daejeon, South Korea
Jung Ho Ahn , Seoul National University, Seoul, South Korea
Jae W. Lee , Seoul National University, Seoul, South Korea
John Kim , KAIST, Daejeon, South Korea
pp. 26-29

Extending Amdahl’s Law for Multicores with Turbo Boost (Abstract)

Uri Verner , Department of Computer Science, Technion, Israel
Avi Mendelson , Department of Computer Science, Technion, Israel
Assaf Schuster , Department of Computer Science, Technion, Israel
pp. 30-33

Heavy Tails in Program Structure (Abstract)

Hiroshi Sasaki , Department of Computer Science, Columbia University, New York, NY
Fang-Hsiang Su , Department of Computer Science, Columbia University, New York, NY
Teruo Tanimoto , Graduate School of Information Science and Electrical Engineering, Kyushu University, Fukuoka, Japan
Simha Sethumadhavan , Department of Computer Science, Columbia University, New York, NY
pp. 34-37

HeteroSim: A Heterogeneous CPU-FPGA Simulator (Abstract)

Liang Feng , Hong Kong University of Science and Technology, Kowloon, Hong Kong
Hao Liang , Hong Kong University of Science and Technology, Kowloon, Hong Kong
Sharad Sinha , Hong Kong University of Science and Technology, Kowloon, Hong Kong
Wei Zhang , Hong Kong University of Science and Technology, Kowloon, Hong Kong
pp. 38-41

LA-LLC: Inter-Core Locality-Aware Last-Level Cache to Exploit Many-to-Many Traffic in GPGPUs (Abstract)

Xia Zhao , Ghent University, Belgium
Yuxi Liu , Ghent University, Belgium
Almutaz Adileh , Ghent University, Belgium
Lieven Eeckhout , Ghent University, Belgium
pp. 42-45

LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory (Abstract)

Amirali Boroumand , Carnegie Mellon University, Pittsburgh, PA
Saugata Ghose , Carnegie Mellon University, Pittsburgh, PA
Minesh Patel , Carnegie Mellon University, Pittsburgh, PA
Hasan Hassan , Carnegie Mellon University, Pittsburgh, PA
Brandon Lucia , Carnegie Mellon University, Pittsburgh, PA
Kevin Hsieh , Carnegie Mellon University, Pittsburgh, PA
Krishna T. Malladi , Samsung Semiconductor, Inc., Milpitas, CA
Hongzhong Zheng , Samsung Semiconductor, Inc., Milpitas, CA
Onur Mutlu , ETH Zurich, Rämistrasse, Zürich, Switzerland
pp. 46-50

Measuring the Impact of Memory Errors on Application  Performance (Abstract)

Mark Gottscho , Electrical Engineering Department, University of California, Los Angeles, CA
Mohammed Shoaib , Microsoft Research, Redmond, WA
Sriram Govindan , Microsoft, Redmond, WA
Bikash Sharma , Microsoft, Redmond, WA
Di Wang , Microsoft Research, Redmond, WA
Puneet Gupta , Electrical Engineering Department, University of California, Los Angeles, CA
pp. 51-55

Mind The Power Holes: Sifting Operating Points in Power-Limited Heterogeneous Multicores (Abstract)

Almutaz Adileh , Ghent University, Gent, East Flanders, Belgium
Stijn Eyerman , Intel Belgium, Leuven, Kontich, Belgium
Aamer Jaleel , Nvidia Research, Boston, MA
Lieven Eeckhout , Ghent University, Gent, East Flanders, Belgium
pp. 56-59

Mitigating Power Contention: A Scheduling Based Approach (Abstract)

Hiroshi Sasaki , Department of Computer Science, Columbia University, New York, NY
Alper Buyuktosunoglu , IBM T. J. Watson Research Center, New York, NY
Augusto Vega , IBM T. J. Watson Research Center, New York, NY
Pradip Bose , IBM T. J. Watson Research Center, New York, NY
pp. 60-63

Mth: Codesigned Hardware/Software Support for Fine Grain Threads (Abstract)

David Gonzalez Marquez , Computer Science Department, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires (C1428EGA), Buenos Aires, Argentina
Adrian Cristal Kestelman , Barcelona Supercomputing CenterInstituto de Investigación en Inteligencia Artificial (IIIA-CSIC)
Esteban Mocskos , Computer Science Department, Facultad de Ciencias Exactas y Naturales, Universidad de Buenos Aires (C1428EGA), Buenos Aires, Argentina
pp. 64-67

Optimizing Read-Once Data Flow in Big-Data Applications (Abstract)

Tomer Y. Morad , Department of Electrical Engineering, Technion – Israel Institute of Technology, Haifa, Israel
Gil Shomron , Department of Electrical Engineering, Technion – Israel Institute of Technology, Haifa, Israel
Mattan Erez , Electrical and Computer Engineering Department, University of Texas at Austin, 201 E 24th Street (C0803), POB 6.248, Austin, TX
Avinoam Kolodny , Department of Electrical Engineering, Technion – Israel Institute of Technology, Haifa, Israel
Uri C. Weiser , Department of Electrical Engineering, Technion – Israel Institute of Technology, Haifa, Israel
pp. 68-71

Power-Efficient Accelerator Design for Neural Networks Using Computation Reuse (Abstract)

Ali Yasoubi , Department of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran
Reza Hojabr , Department of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran
Mehdi Modarressi , Department of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran
pp. 72-75

SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture (Abstract)

Young Hoon Son , Seoul National University, South Korea
Hyunyoon Cho , Seoul National University, South Korea
Yuhwan Ro , Seoul National University, South Korea
Jae W. Lee , Sungkyunkwan University, South Korea
Jung Ho Ahn , Seoul National University, South Korea
pp. 76-79

Stripes: Bit-Serial Deep Neural Network Computing (Abstract)

Patrick Judd , The Edward S. Rogers Sr. Department of Electrical & Computer Engineering, University of Toronto, Toronto, ON, Canada
Jorge Albericio , The Edward S. Rogers Sr. Department of Electrical & Computer Engineering, University of Toronto, Toronto, ON, Canada
Andreas Moshovos , The Edward S. Rogers Sr. Department of Electrical & Computer Engineering, University of Toronto, Toronto, ON, Canada
pp. 80-83

Timing Speculation in Multi-Cycle Data Paths (Abstract)

Gokul Subramanian Ravi , Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI
Mikko Lipasti , Department of Electrical and Computer Engineering, University of Wisconsin, Madison, WI
pp. 84-87
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