Issue No. 01 - January-June (2013 vol. 12)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2012.6
I. B. Karsli , TOBB Univ. of Econ. & Technol., Ankara, Turkey
P. Reviriego , Univ. Antonio de Nebrija, Madrid, Spain
M. F. Balli , TOBB Univ. of Econ. & Technol., Ankara, Turkey
O. Ergin , TOBB Univ. of Econ. & Technol., Ankara, Turkey
J. A. Maestro , Univ. Antonio de Nebrija, Madrid, Spain
Soft errors are transient errors that can alter the logic value of a register bit causing data corruption. They can be caused by radiation particles such as neutrons or alpha particles. Narrow values are commonly found in the data consumed or produced by processors. Several techniques have recently been proposed to exploit the unused bits in narrow values to protect them against soft errors. These techniques replicate the narrow value over the unused register bits such that errors can be detected when the value is duplicated and corrected when the value is tripled. In this letter, a technique that can correct errors when the narrow value is only duplicated is presented. The proposed approach stores a modified duplicate of the narrow value such that errors on the original value and the duplicate can be distinguished and therefore corrected. The scheme has been implemented at the circuit level to evaluate its speed and also at the architectural level to assess the benefits in correcting soft errors. The results show that the scheme is significantly faster than a parity check and can improve substantially the number of soft errors that are corrected compared to existing techniques.
Data processing, Registers, Logic gates, Program processors, Error correction, Parity check codes, Benchmark testing
I. B. Karsli, P. Reviriego, M. F. Balli, O. Ergin and J. A. Maestro, "Enhanced Duplication: a Technique to Correct Soft Errors in Narrow Values," in IEEE Computer Architecture Letters, vol. 12, no. 1, pp. 13-16, 2014.