Issue No. 02 - July-December (2010 vol. 9)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2010.18
Meng Zhang , Duke University, Durham
Alvin R. Lebeck , Duke University, Durham
Daniel J. Sorin , Duke University, Durham
One of the most challenging problems in developing a multicore processor is verfiying that the design is correct, and one of the most difficult aspects of pre-silicon verification is verifying that the memory system obeys the architecture’s specified memory consistency model. To simplify the process of pre-silicon design verification, we propose a system model called the Fractally Consistent Model (FCM). We prove that systems that adhere to the FCM can be verified to obey the memory consistency model in three simple, scalable steps. The procedure for verifying FCM systems contrasts sharply with the difficult, non-scalable procedure required to verify non-FCM systems. We show that FCM systems do not necessarily sacrifice performance, compared to non-FCM systems, despite being simpler to verify.
Memory hierarchy, Micro-architecture implementation considerations, Processor Architectures, Computer Reliability, Testing, Fault-Tolerance, Verification, Performance Analysis and Design Aids, Arithmetic and Logic Structures, Hardware
A. R. Lebeck, D. J. Sorin and M. Zhang, "Fractal Consistency: Architecting the Memory System to Facilitate Verification," in IEEE Computer Architecture Letters, vol. 9, no. , pp. 61-64, 2010.