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Issue No. 01 - January-June (2009 vol. 8)
ISSN: 1556-6056
pp: 13-16
Pranav Vaidya , IUPUI, Indianapolis
Jaehwan John Lee , IUPUI,Indianapolis
Christopher Barnes , IUPUI, Indianapolis
Computer architecture simulation has always played a pivotal role in continuous innovation of computers. However, constructing or modifying a high quality simulator is time consuming and error-prone. Thus, often Architecture Description Languages (ADLs) are used to provide an abstraction layer for describing the computer architecture and automatically generating corresponding simulators. Along the line of such research, we present a novel XML-based ADL, its compiler, and a generation methodology to automatically generate multithreaded simulators for computer architecture. We utilize the industry-standard extensible markup language XML to describe the functionality and architecture of a modeled processor. Our ADL framework allows users to easily and quickly modify the structure, register set, and execution of a modeled processor. To prove its validity, we have generated several multithreaded simulators with different configurations based on the MIPS five-stage processor, and successfully tested with two programs.
Modeling of computer architecture, Pipeline processors
Pranav Vaidya, Jaehwan John Lee, Christopher Barnes, "An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators", IEEE Computer Architecture Letters, vol. 8, no. , pp. 13-16, January-June 2009, doi:10.1109/L-CA.2009.2
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