Issue No. 01 - January-June (2009 vol. 8)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2009.1
Po-Han Wang , National Taiwan Universit, Taipei
Yen-Ming Chen , National Taiwan Universit, Taipei
Chia-Lin Yang , National Taiwan University, Taipei
Yu-Jung Cheng , National Taiwan Universit, Taipei
As technology continues to shrink, reducing leakage is critical to achieve energy efficiency. Previous works on low-power GPU (Graphics Processing Unit) focus on techniques for dynamic power reduction, such as DVFS (Dynamic Voltage/Frequency Scaling) and clock gating. In this paper, we explore the potential of adopting architecturelevel power gating techniques for leakage reduction on GPU. In particular, we focus on the most power-hungry components, shader processors. We observe that, due to different scene complexity, the required shader resources to satisfy the target frame rate actually vary across frames. Therefore, we propose the Predictive Shader Shutdown technique to exploit workload variation across frames for leakage reduction on shader processors. The experimental results show that Predictive Shader Shutdown achieves up to 46% leakage reduction on shader processors with negligible performance degradation.
Low-power design, Energy-aware systems
P. Wang, Y. Cheng, C. Yang and Y. Chen, "A Predictive Shutdown Technique for GPU Shader Processors," in IEEE Computer Architecture Letters, vol. 8, no. , pp. 9-12, 2009.