Issue No. 01 - January-June (2009 vol. 8)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2008.13
Jung Ho Ahn , Hewlett-Packard Company
Jacob Leverich , Stanford University
Robert Schreiber , Hewlett-Packard
Norman P. Jouppi , Hewlett-Packard
Demand for memory capacity and bandwidth keeps increasing rapidly in modern computer systems, and memory power consumption is becoming a considerable portion of the system power budget. However, the current DDR DIMM standard is not well suited to effectively serve CMP memory requests from both a power and performance perspective. We propose a new memory module called a Multicore DIMM, where DRAM chips are grouped into multiple virtual memory devices, each of which has its own data path and receives separate commands. The Multicore DIMM is designed to improve the energy efficiency of memory systems with small impact on system performance. Dividing each memory modules into 4 virtual memory devices brings a simultaneous 22%, 7.6%, and 18% improvement in memory power, IPC, and system energy-delay product respectively on a set of multithreaded applications and consolidated workloads.
Energy-aware systems, Memory Structures, DRAM
J. H. Ahn, N. P. Jouppi, R. Schreiber and J. Leverich, "Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs," in IEEE Computer Architecture Letters, vol. 8, no. , pp. 5-8, 2008.