Issue No. 01 - January-June (2006 vol. 5)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/L-CA.2006.9
We propose implementing cache coherence protocolswithin the network, demonstrating how an in-networkimplementation of the MSI directory-based protocol allowsfor in-transit optimizations of read and write delay. Ourresults show 15% and 24% savings on average in memoryaccess latency for SPLASH-2 parallel benchmarks runningon a 4x4 and a 16x16 multiprocessor respectively.
cache coherence, interconnection network
L. Shang, L. Peh and N. Eisley, "In-Network Cache Coherence," in IEEE Computer Architecture Letters, vol. 5, no. , pp. 34-37, 2006.