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IEEE Computer Architecture Letters
By Shahar Kvatinsky,Yuval H. Nacson,Yoav Etsion,Eby G. Friedman,Avinoam Kolodny,Uri C. Weiser
Issue Date:January 2014
Switch on Event Multithreading (SoE MT, also known as coarse-grained MT and block MT) processors run multiple threads on a pipeline machine, while the pipeline switches threads on stall events (e.g., cache miss). The thread switch penalty is determined by ...
Memristor-based IMPLY logic design procedure
Computer Design, International Conference on
By Shahar Kvatinsky,Avinoam Kolodny,Uri C. Weiser,Eby G. Friedman
Issue Date:October 2011
Memristors can be used as logic gates. No design methodology exists, however, for memristor-based combinatorial logic. In this paper, the design and behavior of a memristive-based logic gate - an IMPLY gate - are presented and design issues such as the tra...
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