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Displaying 1-4 out of 4 total
Built-in aging monitoring for safety-critical applications
Found in: On-Line Testing Symposium, IEEE International
By J.C. Vazquez, V. Champac, A.M. Ziesemer, R. Reis, I.C. Teixeira, M.B. Santos, J.P. Teixeira
Issue Date:June 2009
pp. 9-14
Complex electronic systems for safety or mission-critical applications (automotive, space) must operate for many years in harsh environments. Reliability issues are worsening with device scaling down, while performance and quality requirements are increasi...
Predictive error detection by on-line aging monitoring
Found in: On-Line Testing Symposium, IEEE International
By J. C. Vazquez, V. Champac, A. M. Ziesemer, R. Reis, J. Semiao, I. C. Teixeira, M. B. Santos, J. P. Teixeira
Issue Date:July 2010
pp. 9-14
The purpose of this paper is to present a predictive error detection methodology, based on monitoring of long-term performance degradation of semiconductor systems. Delay variation is used to sense timing degradation due to aging (namely, due to NBTI), or ...
A Graph-Oriented CAD Tool for Establishing the Topological Diagnostic Conditions of Analogue Circuits
Found in: Integrated Circuit Design and System Design, Symposium on
By A. Sarmiento-Reyes, M. Gutierrez-de Anda, V. Champac
Issue Date:February 1998
pp. 179
No summary available.
Reliability Analysis of Small Delay Defects Due to Via Narrowing in Signal Paths
Found in: IEEE Design & Test of Computers
By H. VILLACORTA,V. Champac,R. Gomez,C. Hawkins,J. Segura
Issue Date:January 2013
pp. 1
Open defects in vias are a dominant failure mechanism in nanometer technologies. Their defect probability has increased with the introduction of the copper process, smaller geometries, and via counts on the order of billions for modern integrated circuits....