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Displaying 1-49 out of 49 total
Communication styles for parallel systems
Found in: Computer
By Thomas Gross, Susan Hinrichs, David R. O'Hallaron, Thomas Stricker, Atsushi Hasegawa
Issue Date:December 1994
pp. 34-44
<p>Distributed-memory parallel systems rely on explicit message exchange for communication, but the communication operations they support can differ in many aspects. One key difference is the way messages are generated or consumed. With systolic comm...
 
Adaptive Distributed Applications on Heterogeneous Networks
Found in: Heterogeneous Computing Workshop
By Thomas Gross, Peter Steenkiste, Jaspal Subhlok
Issue Date:April 1999
pp. 209
Distributed applications execute in environments that can include different network architectures as well as a range of compute platforms. Furthermore, these resources are shared by many users. Therefore these applications receive varying levels of service...
 
A Resource Query Interface for Network-Aware Applications
Found in: High-Performance Distributed Computing, International Symposium on
By Bruce Lowekamp, Nancy Miller, Dean Sutherland, Thomas Gross, Peter Steenkiste, Jaspal Subhlok
Issue Date:July 1998
pp. 189
Development of portable network-aware applications demands an interface to the network that allows an application to obtain information about its execution environment. This paper motivates and describes the design of Remos, an API that allows network-awar...
 
Vertical Protocol Composition
Found in: Computer Security Foundations Symposium, IEEE
By Thomas Groß, Sebastian Mödersheim
Issue Date:June 2011
pp. 235-250
The security of key exchange and secure channel protocols, such as TLS, has been studied intensively. However, only few works have considered what happens when the established keys are actuallyused -- to run some protocol securely over the established
 
A Virtualization Assurance Language for Isolation and Deployment
Found in: Policies for Distributed Systems and Networks, IEEE International Workshop on
By Sören Bleikertz, Thomas Groß
Issue Date:June 2011
pp. 33-40
Cloud computing and virtualized infrastructures are often accompanied by complex configurations and topologies. Dynamic scaling, rapid virtual machine deployment, and open multi-tenant architectures create an environment, in which local misconfiguration ca...
 
Application-oriented communication for networked systems
Found in: Parallel and Distributed Systems, International Conference on
By Roger Karrer, Thomas Gross
Issue Date:July 2005
pp. 695-701
<p>The lack of flexibility in the application-network interface severely limits the ability to develop and tailor distributed applications, such as real-time streaming and multiparty communication, to their communication demands. While network-centri...
 
Security Analysis of the SAML Single Sign-on Browser/Artifact Profile
Found in: Computer Security Applications Conference, Annual
By Thomas Groß
Issue Date:December 2003
pp. 298
Many influential industrial players are currently pursuing the development of new protocols for federated identity management. The Security Assertion Markup Language (SAML) is an important standardized example of this new protocol class and will be widely ...
 
Organizing a Distributed Application in a Mobile Ad Hoc Network
Found in: Network Computing and Applications, IEEE International Symposium on
By Cristian Tuduce, Thomas Gross
Issue Date:April 2003
pp. 231
A distributed application that operates in an ad hoc network formed by mobile nodes must limit its use of all-to-all communication since the overall capacity of such a network is severely constrained. To address this problem, we describe an algorithm that ...
 
The Architecture of the Remos System
Found in: High-Performance Distributed Computing, International Symposium on
By Peter A. Dinda, Thomas Gross, Roger Karrer, Bruce Lowekamp, Nancy Miller, Peter Steenkiste, Dean Sutherland
Issue Date:August 2001
pp. 0252
Abstract: Remos provides resource information to distributed applications. Its design goals of scalability, flexibility, and portability are achieved through an architecture that allows components to be positioned across the network, each collecting inform...
 
Direct Queries for Discovering Network Resource Properties in a Distributed Environment
Found in: High-Performance Distributed Computing, International Symposium on
By Bruce Lowekamp, David O'Hallaron, Thomas Gross
Issue Date:August 1999
pp. 5
The development and performance of network-aware applications depends on the availability of accurate predictions of network resource properties. Obtaining this information directly from the network is a scalable solution that provides the accurate perform...
 
A Framework-Based Approach to the Development of Network-Aware Applications
Found in: IEEE Transactions on Software Engineering
By Jürg Bolliger, Thomas Gross
Issue Date:May 1998
pp. 376-390
<p><b>Abstract</b>—Modern networks provide a QoS (quality of service) model to go beyond best-effort services, but current QoS models are oriented towards low-level network parameters (e.g., bandwidth, latency, jitter). Application develo...
 
Impact of Job Mix on Optimizations for Space Sharing Schedulers
Found in: SC Conference
By Jaspal Subhlok, Thomas Gross, Takashi Suzuoka
Issue Date:January 1996
pp. 54
Abstract Modern parallel systems with N nodes can concurrently service multiple jobs requesting a total of up to to N nodes. One of the challenges for the operating system is to give reasonable service to a diverse group of jobs. Asequence of large jobs, e...
 
Task Parallelism in a High Performance Fortran Framework
Found in: IEEE Concurrency
By Thomas Gross, David R. O'Hallaron, Jaspal Subhlok
Issue Date:September 1994
pp. 16-26
Exploiting both data and task parallelism in a single framework is the key to achieving good performance for a variety of applications.
 
Subset barrier synchronization on a private-memory parallel system
Found in: Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures (SPAA '92)
By Anja Feldmann, David O'Hallaron, Thomas Gross, Thomas M. Stricker
Issue Date:June 1992
pp. 209-218
We propose a new design for highly concurrent Internet services, which we call the staged event-driven architecture (SEDA). SEDA is intended to support massive concurrency demands and simplify the construction of well-conditioned services. In SEDA, applica...
     
Online feedback-directed optimizations for parallel Java code
Found in: Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications (OOPSLA '13)
By Thomas Gross, Albert Noll
Issue Date:October 2013
pp. 713-728
The performance of parallel code significantly depends on the parallel task granularity (PTG). If the PTG is too coarse, performance suffers due to load imbalance; if the PTG is too fine, performance suffers from the overhead that is induced by parallel ta...
     
Big data: little software?
Found in: Proceedings of the 6th International Systems and Storage Conference (SYSTOR '13)
By Thomas Gross
Issue Date:June 2013
pp. 1-1
The steps of accessing, storing, and transmitting "Big Data" raise many interesting problems. But big data sets also amplify any system or software inefficiencies when large data sets require processing. So the efficiency of the generate code (and the runt...
     
An approach towards a full-reference-based benchmarking for quality-optimized endoscopic video stabilization systems
Found in: Proceedings of the Eighth Indian Conference on Computer Vision, Graphics and Image Processing (ICVGIP '12)
By Markus Borschbach, Marvin C. Offiah, Nail El-Sourani, Navya Amin, Thomas Gross
Issue Date:December 2012
pp. 1-8
Since the last two decades, research in the area of video stabilization has been tremendously increasing. More and more algorithms are being developed for counteracting the distortions existing in the videos. In the field of invasive diagnostics and therap...
     
Validation of a miniaturized wireless network testbed
Found in: Proceedings of the third ACM international workshop on Wireless network testbeds, experimental evaluation and characterization (WiNTECH '08)
By Thomas Gross, Yang Su
Issue Date:September 2008
pp. 1-2
Experimentation with wireless network testbeds is preferred to simulations for performing high fidelity testing. However, realistic experimentation with full-scale networks is difficult, time-consuming, and expensive. To side-step some of these problems, w...
     
User centricity: a taxonomy and open issues
Found in: Proceedings of the second ACM workshop on Digital identity management (DIM '06)
By Abhilasha Bhargav-Spantzely, Dieter Sommer, Jan Camenisch, Thomas Gross
Issue Date:November 2006
pp. 1-10
User centricity is a significant concept in federated identity management (FIM), as it provides for stronger user control and privacy. However, several notions of user-centricity in the FIM community render its semantics unclear and hamper future research ...
     
Enhancing privacy of federated identity management protocols: anonymous credentials in WS-security
Found in: Proceedings of the 5th ACM workshop on Privacy in electronic society (WPES '06)
By Dieter Sommer, Jan Camenisch, Thomas Gross
Issue Date:October 2006
pp. 67-72
Federated Identity Management (FIM) allows for securely provisioning certified user identities and attributes to relying parties. It establishes higher security and data quality compared to user-asserted attributes and provides for stronger user privacy pr...
     
An evaluation of inter-vehicle ad hoc networks based on realistic vehicular traces
Found in: Proceedings of the seventh ACM international symposium on Mobile ad hoc networking and computing (MobiHoc '06)
By Rainer Baumann, Thomas Gross, Valery Naumov
Issue Date:May 2006
pp. 108-119
Vehicular ad hoc networks (VANETs) using WLAN tech-nology have recently received considerable attention. The evaluation of VANET routing protocols often involves simulators since management and operation of a large number of real vehicular nodes is expensi...
     
Approximation of the worst-case execution time using structural analysis
Found in: Proceedings of the fourth ACM international conference on Embedded software (EMSOFT '04)
By Matteo Corti, Thomas Gross
Issue Date:September 2004
pp. 269-277
We present a technique to approximate the worst-case execution time that combines structural analysis with a loop-bounding algorithm based on local induction variable analysis. Structural analysis is an attractive foundation for several reasons: it deliver...
     
An analytical model for software-only main memory compression
Found in: Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture (WMPI '04)
By Irina Chihaia, Thomas Gross
Issue Date:June 2004
pp. 107-113
Many applications with large data spaces that cannot run on a typical workstation (due to page faults) call for techniques to expand the effective memory size. One such technique is memory compression.Understanding what applications under what conditions c...
     
Just-in-time aspects: efficient dynamic weaving for Java
Found in: Proceedings of the 2nd international conference on Aspect-oriented software development (AOSD '03)
By Andrei Popovici, Gustavo Alonso, Thomas Gross
Issue Date:March 2003
pp. 100-109
Recent developments in service architectures suggest that run-time adaptations could be implemented with dynamic AOP. In this paper we discuss application requirements on run-time AOP support and present a system that addresses these requirements. We provi...
     
Dynamic weaving for aspect-oriented programming
Found in: Proceedings of the 1st international conference on Aspect-oriented software development (AOSD '02)
By Andrei Popovici, Gustavo Alonso, Thomas Gross
Issue Date:April 2002
pp. 141-147
When using Aspect Oriented Programming in the development of software components, a developer must understand the program units actually changed by weaving, how they behave, and possibly correct the aspects used. Support for rapid AOP prototyping and debug...
     
Topology discovery for large ethernet networks
Found in: Proceedings of the 2001 conference on Applications, technologies, architectures, and protocols for computer communications (SIGCOMM '01)
By Bruce Lowekamp, David O'Hallaron, Thomas Gross
Issue Date:August 2001
pp. 237-248
Routers must do a best matching prefix lookup for every packet; solutions for Gigabit speeds are well known. As Internet link speeds higher, we seek a scalable solution whose speed scales with memory speeds while allowing large prefix databases. In this pa...
     
Dynamic handoff of multimedia streams
Found in: Proceedings of the 11th international workshop on Network and operating systems support for digital audio and video (NOSSDAV '01)
By Roger Karrer, Thomas Gross
Issue Date:January 2001
pp. 125-133
Sometimes a client that receives a multimedia stream from a server can change the connection used to transfer the data. There may be multiple paths or multiple servers, but a switch from one connection to another requires a handoff. During such a handof...
     
Transparent adaptive parallelism on NOWs using OpenMP
Found in: Proceedings of the seventh ACM SIGPLAN symposium on Principles and practice of parallel programming (PPoPP '99)
By Alex Scherer, Honghui Lu, Thomas Gross, Willy Zwaenepoel
Issue Date:May 1999
pp. 201-211
We present a system that allows OpenMP programs to execute on a network of workstations with a variable number of nodes. The ability to adapt to a variable number of nodes allows a program to take advantage of additional nodes that become available after i...
     
Role model based framework design and integration
Found in: Proceedings of the conference on Object-oriented programming, systems, languages, and applications (OOPSLA '98)
By Dirk Riehle, Thomas Gross
Issue Date:October 1998
pp. 150-151
Today, any large object-oriented software system is built using frameworks. Yet, designing frameworks and defining their interaction with clients remains a difficult task. A primary reason is that today's dominant modeling concept, the class, is not well s...
     
Warp architecture and implementation
Found in: 25 years of the international symposia on Computer architecture (selected papers) (ISCA '98)
By Emmanuel Arnould, H. T. Kung, Jon A. Webb, Ken Sarocky, Marco Annaratone, Monica S. Lam, Onat Menzilcioglu, Thomas Gross
Issue Date:June 1998
pp. 309-319
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory. The program data set (and/or text) is distributed across these memories. In ...
     
Retrospective: a retrospective on the Warp machines
Found in: 25 years of the international symposia on Computer architecture (selected papers) (ISCA '98)
By Monica Lam, Thomas Gross
Issue Date:June 1998
pp. 45-47
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory. The program data set (and/or text) is distributed across these memories. In ...
     
Call-cost directed register allocation
Found in: Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation (PLDI '97)
By Guei-Yuan Lueh, Thomas Gross
Issue Date:June 1997
pp. 329-338
Choosing the right kind of register for a live range plays a major role in eliminating the register-allocation overhead when the compiled function is frequently executed or function tails are on the most frequently executed paths. Picking the wrong kind of...
     
Impact of job mix on optimizations for space sharing schedulers
Found in: Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) (Supercomputing '96)
By Jaspal Subhlok, Takashi Suzuoka, Thomas Gross
Issue Date:November 1996
pp. 54-es
This paper addresses job scheduling for parallel supercomputers. Modern parallel systems with n nodes can be used by jobs requesting up to n nodes. If less than n nodes are requested, multiple jobs can be run at the same time, allowing several users to use...
     
Code reuse in an optimizing compiler
Found in: Proceedings of the eleventh annual conference on Object-oriented programming systems, languages, and applications (OOPSLA '96)
By Ali-Reza Adl-Tabatabai, Guei-Yuan Lueh, Thomas Gross
Issue Date:October 1996
pp. 99-107
This paper describes how the cmcc compiler reuses code---both internally (reuse between different modules) and externally (reuse between versions for different target machines). The key to reuse are the application frameworks developed for global data-flow...
     
Source-level debugging of scalar optimized code
Found in: Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation (PLDI '96)
By Ali-Reza Adl-Tabatabai, Thomas Gross
Issue Date:May 1996
pp. 329-338
Although compiler optimizations play a crucial role in the performance of modern computer systems, debugger technology has lagged behind in its support of optimization. Yet debugging the unoptimized translation is often impossible or futile, so handling of...
     
Communication and memory requirements as the basis for mapping task and data parallel programs
Found in: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (Supercomputing '94)
By David R. O'Hallaron, Jaspal Subhlok, Jon Webb, Peter A. Dinda, Thomas Gross
Issue Date:November 1994
pp. 330-339
For a wide variety of applications, both task and data parallelism must be exploited to achieve the best possible performance on a multicomputer. Recent research has underlined the importance of exploiting task and data parallelism in a single compiler fra...
     
Architecture implications of high-speed I/O for distributed-memory computers
Found in: Proceedings of the 8th international conference on Supercomputing (ICS '94)
By Peter Steenkiste, Thomas Gross
Issue Date:July 1994
pp. 176-185
We consider the problem of high-speed I/O for a single application running on multiple nodes of a distributed-memory parallel computer. Our model is that the parallel system is connected to an I/O system that provides the interface between the internal con...
     
Detection and recovery of endangered variables caused by instruction scheduling
Found in: Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation (PLDI '93)
By Ali-Reza Adl-Tabatabai, Thomas Gross
Issue Date:June 1993
pp. 329-338
Instruction scheduling re-orders and interleaves instruction sequences from different source statements. This impacts the task of a symbolic debugger, which attempts to present the user a picture of program execution that matches the source program. At a b...
     
Exploiting task and data parallelism on a multicomputer
Found in: Proceedings of the fourth ACM SIGPLAN symposium on Principles and practice of parallel programming (PPOPP '93)
By David R. O'Hallaron, James M. Stichnoth, Jaspal Subhlok, Thomas Gross
Issue Date:May 1993
pp. 201-211
For many applications, achieving good performance on a private memory parallel computer requires exploiting data parallelism as well as task parallelism. Depending on the size of the input data set and the number of nodes (i.e., processors), different trad...
     
Evicted variables and the interaction of global register allocation and symbolic debugging
Found in: Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages (POPL '93)
By Ali-Reza Adl-Tabatabai, Thomas Gross
Issue Date:March 1993
pp. 371-383
A symbolic debugger allows a user to display the values of program variables at a breakpoint. However, problems arise if the program is translated by an optimizing compiler. This paper addresses the effects of global register allocation and assignment: a r...
     
Combining the concepts of compression and caching for a two-level filesystem
Found in: Proceedings of the fourth international conference on Architectural support for programming languages and operating systems (ASPLOS-IV)
By Thomas Gross, Vincent Cate
Issue Date:April 1991
pp. 205-209
This paper investigates the limitations on designing a processor which can sustain an execution rate of greater than one instruction per cycle on highly-optimized, non-scientific applications. We have used trace-driven simulations to determine that these a...
     
Teaching the programming of parallel computers
Found in: Proceedings of the twenty-second SIGCSE technical symposium on Computer science education (SIGCSE '91)
By Allan L. Fisher, Thomas Gross
Issue Date:March 1991
pp. 313-317
In the past few years there have been significant advances in both the computational and graphics capabilities of micro-computers. In graphics the standard (for the IBM compatible world) has advanced from the Computer Graphics Adapter (CGA) through the Enh...
     
Supporting systolic and memory communication in iWarp
Found in: Proceedings of the 17th annual international symposium on Computer Architecture (ISCA '90)
By Brian Moore, Craig Peterson, George Cox, H. T. Kung, Jim Susman, Jim Sutton, John Urbanski, Jon Webb, Margie Levine, Monica Lam, Robert Cohn, Shekhar Borkar, Thomas Gross, Wire Moore
Issue Date:May 1990
pp. 309-319
iWarp is a parallel architecture developed jointly by Carnegie Mellon University and Intel Corporation. The iWarp communication system supports two widely used interprocessor communication styles: memory communication and systolic communication. This paper...
     
Architecture and compiler tradeoffs for a long instruction wordprocessor
Found in: Proceedings of the third international conference on Architectural support for programming languages and operating systems (ASPLOS-III)
By Monica Lam, Robert Cohn, Thomas Gross
Issue Date:April 1989
pp. 205-209
A very long instruction word (VLIW) processor exploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compiler tradeoffs in the design of iWarp, a VLIW single-chip microprocessor devel...
     
A program debugger for a systolic array: design and implementation
Found in: Proceedings of the 1988 ACM SIGPLAN and SIGOPS workshop on Parallel and distributed debugging (PADD '88)
By Bernd Bruegge, Thomas Gross
Issue Date:May 1988
pp. 109-116
The Warp machine consists of a programmable linear systolic array connected to a general-purpose workstation host. Warp can be accessed either locally from this host or remotely from a large number of workstations connected to a local area network. Since t...
     
Fusion-based register allocation
Found in: ACM Transactions on Programming Languages and Systems (TOPLAS)
By Ali-Reza Adl-Tabatabai, Guei-Yuan Lueh, Thomas Gross
Issue Date:January 1988
pp. 431-470
The register allocation phase of a compiler maps live ranges of a program to registers. If there are more candidates than there are physical registers, the register allocator must spill a live range (the home location is in memory) or split a live range (t...
     
Compilation for a high-performance systolic array
Found in: Proceedings of the 1986 SIGPLAN symposium on Compiler contruction (SIGPLAN '86)
By Monica S. Lam, Thomas Gross
Issue Date:June 1986
pp. 1160-1164
We report on a compiler for Warp, a high-performance systolic array developed at Carnegie Mellon. This compiler enhances the usefulness of Warp significantly and allows application programmers to code substantial algorithms.The compiler combines a novel pr...
     
Distributed debugging: session summary
Found in: Proceedings of the symposium on High-level debugging (SIGSOFT '83)
By Thomas Gross
Issue Date:March 1983
pp. 253-265
We are currently implementing a system to help experienced programmers during the development, implementation and debugging of their programs. This system, built on top of a screen oriented structural editor, offers possibilities to attach descriptors to e...
     
Hardware/software tradeoffs for increased performance
Found in: Proceedings of the first international symposium on Architectural support for programming languages and operating systems (ASPLOS-I)
By Forest Baskett, John Gill, John Hennessy, Norman Jouppi, Thomas Gross
Issue Date:March 1982
pp. 2-11
Most new computer architectures are concerned with maximizing performance by providing suitable instruction sets for compiled code and providing support for systems functions. We argue that the most effective design methodology must make simultaneous trade...
     
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