Low-power functionality enhanced computation architecture using spin-based devices
Nanoscale Architectures, IEEE International Symposium on
By Charles Augustine,Georgios Panagopoulos,Behtash Behin-Aein,Srikant Srinivasan,Angik Sarkar,Kaushik Roy
Issue Date:June 2011
Power consumption in CMOS integrated circuits increases every technology generation due to increased subthreshold and gate leakage currents. To cope with such a problem, researchers have started looking at the possibility of logic devices based on electron...