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A 36.1 GHz Single Stage Low Noise Amplifier Using 0.13 µm CMOS Process
Found in: Computer Science and Information Engineering, World Congress on
By S.M. Shahriar Rashid, Sheikh Nijam Ali, Apratim Roy, A.B.M.H. Rashid
Issue Date:April 2009
pp. 480-483
In this paper, a 36.1 GHz single stage LNA using a simple passive output matching technique is demonstrated. The circuit is simulated in Cadence Spectre with 0.13μm CMOS process parameters. The simulated results exhibit a forward gain of 11.4 dB at 36.1 GH...
Microprocessor Based Design of the Control Mechanism of Automatic Mail Sorting Machine
Found in: Computer Science and Software Engineering, International Conference on
By Md. Manzur Rahman, Md. Nayim Kabir, S.M. Shahriar Rashid
Issue Date:December 2008
pp. 1170-1173
Application of modern control mechanism on mail sorting system may be an efficient approach of reducing the delays and mismanagements, experienced in our traditional postal system. In this paper, we have developed an efficient idea of control mechanism of ...